A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier

Adelmo Ortiz-Conde; Carlos Ávila-Avendaño; Jesús A. Caraveo-Frescas; Manuel A. Quevedo-López; Francisco J. García-Sánchez

doi:10.1016/j.sse.2021.108218

A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier

Adelmo Ortiz-Conde^*, Carlos Ávila-Avendaño, Jesús A. Caraveo-Frescas, Manuel A. Quevedo-López, Francisco J. García-Sánchez

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

This article presents a generalization of a transregional polylogarithmic model, previously proposed for continuously describing the transfer characteristics of polycrystalline and amorphous Thin Film Transistors (TFTs) at all levels of inversion. The present generalization entails including the necessary drain voltage dependencies to be able to describe also the output characteristics. The model is tested by using it in the design and analysis of a CMOS inverter amplifier consisting of poly-Si n- and p-channel TFTs fabricated at low temperature and pressure. The transistors are biased below threshold so that the CMOS amplifier circuit operates in weak conduction, having in mind energy saving considerations. The validity of the proposed model has been ascertained by comparing model simulations to actual measured data from individual poly-Si TFTs and from the CMOS amplifier circuit. The simulations of the CMOS inverter amplifier are compared to the results obtained using look-up table-type simulations.

Original language	English
Article number	108218
Journal	Solid-State Electronics
Volume	188
DOIs	https://doi.org/10.1016/j.sse.2021.108218
State	Published - Feb 2022
Externally published	Yes

Bibliographical note

Funding Information:
Prof. Manuel Quevedo received his B.Sc degree in Chemistry at the University of Sonora, an MS degree in Materials Science at The Saltillo Institute of Science and Technology and his Ph.D. from the University of North Texas (2002). After completing his PhD, Dr. Quevedo joined Texas Instruments' R&D Department as member of technical staff where he developed high tech materials and devices. While at Texas Instruments, Dr. Quevedo was appointed Texas Instruments assignee at International Sematech where he worked with other companies (Intel, IBM, Motorola, Samsung, AMD, etc.) to continue developing alternate materials for nano devices. In 2010 Dr. Quevedo joined the Materials Science and Engineering Faculty at the University of Texas at Dallas as Associate Professor and was promoted to tenured full professor in 2014. Dr. Quevedo is also member of the scientific board of Nanoholdings LLC and CTO of WAND LLC. Dr. Quevedo has published more than 250 papers, 4 book chapters, and holds 10 US patents with 8 more pending. His current research includes nanostructured materials and devices for flexible electronics, large area sensors and energy harvesting. He currently directs a research group of about 25 members. Prof. Quevedo’s research is supported by the The National Science Foundation (NSF), The Air Force Office of Sponsored Research (AFOSR), Defense Advanced Research Projects (DARPA), Domestic Nuclear Detection Office (DNDO), Conacyt, and NanoHoldings LLC.

Publisher Copyright:
© 2021 Elsevier Ltd

Keywords

CMOS inverter amplifier
Lookup Table
MOSFET
Parameter extraction
Weak-inversion
polysilicon thin-film transistors (TFTs)

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10.1016/j.sse.2021.108218

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title = "A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier",

abstract = "This article presents a generalization of a transregional polylogarithmic model, previously proposed for continuously describing the transfer characteristics of polycrystalline and amorphous Thin Film Transistors (TFTs) at all levels of inversion. The present generalization entails including the necessary drain voltage dependencies to be able to describe also the output characteristics. The model is tested by using it in the design and analysis of a CMOS inverter amplifier consisting of poly-Si n- and p-channel TFTs fabricated at low temperature and pressure. The transistors are biased below threshold so that the CMOS amplifier circuit operates in weak conduction, having in mind energy saving considerations. The validity of the proposed model has been ascertained by comparing model simulations to actual measured data from individual poly-Si TFTs and from the CMOS amplifier circuit. The simulations of the CMOS inverter amplifier are compared to the results obtained using look-up table-type simulations.",

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AU - Ortiz-Conde, Adelmo

AU - Ávila-Avendaño, Carlos

AU - Caraveo-Frescas, Jesús A.

AU - Quevedo-López, Manuel A.

AU - García-Sánchez, Francisco J.

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AB - This article presents a generalization of a transregional polylogarithmic model, previously proposed for continuously describing the transfer characteristics of polycrystalline and amorphous Thin Film Transistors (TFTs) at all levels of inversion. The present generalization entails including the necessary drain voltage dependencies to be able to describe also the output characteristics. The model is tested by using it in the design and analysis of a CMOS inverter amplifier consisting of poly-Si n- and p-channel TFTs fabricated at low temperature and pressure. The transistors are biased below threshold so that the CMOS amplifier circuit operates in weak conduction, having in mind energy saving considerations. The validity of the proposed model has been ascertained by comparing model simulations to actual measured data from individual poly-Si TFTs and from the CMOS amplifier circuit. The simulations of the CMOS inverter amplifier are compared to the results obtained using look-up table-type simulations.

KW - CMOS inverter amplifier

KW - Lookup Table

KW - MOSFET

KW - Parameter extraction

KW - Weak-inversion

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JO - Solid-State Electronics

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ER -

A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier

Abstract

Bibliographical note

Keywords

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