Design considerations for II-VI multi-gate transistors: The case of cadmium sulfide

J. Conde, I. Mejia, F. S. Aguirre-Tostado, C. Young, M. A. Quevedo-Lopez

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In this paper, we report a feasibility study of MuGFETs (multi-gate field effect transistors) devices using solution-based cadmium sulfide films as the semiconductor. The simulations were carried out using the commercially available ATLAS simulator. Experimental parameters for CdS were extracted from planar thin film transistors fabricated using photolithography methods. Several critical design parameters for MuGFETs devices were studied, including fin width, fin high, channel length, and CdS carrier concentration. Short-channel effects can be reasonably controlled by reducing either fin height or width. It is shown that is possible to fabricate devices that operate in depletion or enhancement mode by controlling the device structure. ION/I OFF ratio was in the range 108-1010, subthreshold slope was closely related to the geometry of the MuGFET. We also observed that as the CdS carrier concentration decreases, the on-voltage shifts to positive values. Optimized MuGFETs simulated in enhancement mode show excellent subthreshold slope, and ION/IOFF ratio ∼1010. This study demonstrates that CdS can be used to fabricate enhanced mode/depletion mode devices using solution-based semiconductors. Furthermore, all processing is kept at temperatures below 100 °C, which demonstrates that these devices can be used in flexible substrates.

Original languageEnglish
Article number045006
JournalSemiconductor Science and Technology
Issue number4
StatePublished - Apr 2014


  • 3D simulations
  • MuGFET
  • cadmium sulfide (CdS)
  • design considerations


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