Device and reliability improvement of HfSiON+LaOx/Metal gate stacks for 22nm node application

J. Huang*, P. D. Kirsch, D. Heh, C. Y. Kang, G. Bersuker, M. Hussain, P. Majhi, P. Sivasubramani, D. C. Gilmer, N. Goel, M. A. Quevedo-Lopez, C. Young, C. S. Park, C. Park, P. Y. Hung, J. Price, H. R. Harris, B. H. Lee, H. H. Tseng, R. Jammy

*Autor correspondiente de este trabajo

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

12 Citas (Scopus)

Resumen

For the first time, we illustrate the importance of process sequence for LaOx capped HfSiON/metal gate on performance, variability, scaling, interface quality and reliability. La diffusion to the high-k/low-k interface controls Vt, as well as strongly affects mobility, Nit and BTI. La diffusion is limited to the Si surface by employing SiON interface layer (IL) mitigating the issues of La-induced mobility degradation and PBTI. Improved Vt tunability, reliability and performance are achieved with optimized process sequence, high-k thickness control, LaOx deposition and SiON (not SiO2) IL. Tinv=1.15nm and Vt,lin=0.31V was obtained while achieving the following attributes: mobility∼70%, N it <5×1010 cm-2, δV t<30mV within wafer, BTI δVt <40mV at 125o°C. By optimizing these gate stack factors, we have developed and demonstrated structures for 22nm node LOP application. P. D. Kirsch.

Idioma originalInglés
Título de la publicación alojada2008 IEEE International Electron Devices Meeting, IEDM 2008
DOI
EstadoPublicada - 2008
Publicado de forma externa
Evento2008 IEEE International Electron Devices Meeting, IEDM 2008 - San Francisco, CA, Estados Unidos
Duración: 15 dic. 200817 dic. 2008

Serie de la publicación

NombreTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (versión impresa)0163-1918

Conferencia

Conferencia2008 IEEE International Electron Devices Meeting, IEDM 2008
País/TerritorioEstados Unidos
CiudadSan Francisco, CA
Período15/12/0817/12/08

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