High performance gate first HfSiON dielectric satisfying 45nm node requirements

M. A. Quevedo-Lopez*, S. A. Krishnan, P. D. Kirsch, H. J. Li, J. H. Sim, C. Huffman, J. J. Peterson, B. H. Lee, G. Pant, B. E. Gnade, M. J. Kim, R. M. Wallace, D. Guo, H. Bu, T. P. Ma

*Autor correspondiente de este trabajo

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

11 Citas (Scopus)

Resumen

We show an ALD based HfSiON gate dielectric scaled to 1 nm EOT with excellent performance and reliability. Furthermore, the HfSiON dielectric films are integrated in a gate first approach that includes a 1000°C-5s anneal. It is also demonstrated that this 1 nm EOT HfSiON can achieve electron and hole mobilities comparable to that of SiON. This progress is enabled due to better understanding of the relationship between charge trapping, HfSiON thickness and crystallinity. Performance and reliability improvement is attributed to reduced charge trapping due to suppressed crystallization of the optimized HfSiON films.

Idioma originalInglés
Título de la publicación alojadaIEEE International Electron Devices Meeting, 2005 IEDM - Technical Digest
Páginas425-428
Número de páginas4
EstadoPublicada - 2005
EventoIEEE International Electron Devices Meeting, 2005 IEDM - Washington, DC, MD, Estados Unidos
Duración: 5 dic. 20057 dic. 2005

Serie de la publicación

NombreTechnical Digest - International Electron Devices Meeting, IEDM
Volumen2005
ISSN (versión impresa)0163-1918

Conferencia

ConferenciaIEEE International Electron Devices Meeting, 2005 IEDM
País/TerritorioEstados Unidos
CiudadWashington, DC, MD
Período5/12/057/12/05

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