Modeling and SPICE simulation of CdS-pentacene hybrid CMOS TFTs

In this work we demonstrate that the unified model and parameter extraction method (UMEM) can be used to describe the behavior of hybrid complementary metal-oxide-semiconductor thin film transistors (CMOS TFTs) fabricated with cadmium sulfide (CdS) and pentacene as n-type and p-type active layer, respectively. Both devices were fabricated using a bottom gate configuration and top source-drain (SD) contacts. In particular, we describe the effect of semiconductor defects using the effective medium approximation, which considers a localized charge distribution in the bandgap of the semiconductor. Extracted parameters from UMEM were used in HSPICE to simulate the CMOS inverters fabricated previously by our group.